1. Technical Field
The present disclosure relates to a diversity receiver.
2. Description of the Related Art
A diversity receiver using a plurality of antennas is known. According to A. Afsahi et al., “A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 μm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit”, IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1101-1118, May 2008, a receiving sensitivity of such a diversity receiver is improved by adjusting a phase of a signal from each antenna, using a time-constant circuit that includes a resistor and a capacitor, and by combining adjusted signals such that a receiving level becomes largest.